Obtaining Protection for Mask Works in the U.S.A.

Patents in the USA

Obtaining Protection for Mask Works in the U.S.
By Richard Neifeld

I. Background

The U.S. mask work registration law was first enacted in 1984. Semiconductor Chip Protection Act of 1984, 17 U.S.C. ยงยง 901-14 ("SCPA"). The SCPA was enacted in the early days of IC fabrication in response to certain identified acts of IC copying. However, until very recently, mask work registrations in the U.S. were generally thought to be of little commercial value because mere copying of IC masks (without knowledge of the fabrication processing) was thought to provide little if any competitive advantage. However, the appellate decision in Altera Corporation v. Clear Logic, Incorporated, 2005 Lexis 19284 (9th Cir. September 15, 2005) breathed new life into mask work registrations. In this case, the appeals court found that ASICs manufacturer Clear Logic infringed a mask registration of Altera in which the infringement related to the functionality and *** general *** design of the masks and corresponding programmable logic device ICs, as opposed to a more narrow copyright type of "copying" protection initially envisioned by the SCPA. Clear Logic's business was based upon receiving from a customer an Altera bit stream from Altera's chip design software and reverse engineering an ASIC from the bit stream that would replace the original Altera programmable logic device with a corresponding Clear Logic ASICs chip. It is clear from the opinion that the extenuating factor of Clear Logic's business model swayed both the trial court and the appellate court to accept a very broad scope of protection of Altera's mask work registration.

II. Mask Work Registrations

U.S. mask work registrations cover novel and non-obvious aspects of mask designs used to produce semiconductor ICs. Term of protection extends from date of registration to the end of the tenth calendar year after registration (a little over 10 years). Mask work registrations are only examined for formalities, and therefore issue relatively promptly.

IC chip mask work registrations cover's "mask works" which are defined as a series of images however fixed or encoded in which each image has the pattern of the surface of one form of the semiconductor chip product. The initial owner of the mask work under U.S. law (see 17 USC 901) is the employer of the person creating the mask work (which means that no assignment to the company is required, unlike with U.S. patents).

The mask work's exclusive right extends (see 17 USC 902) to the original aspects of the mask work that are not variations of commonplace or familiar designs.

III. Notice and Enforcement

Registered mask works marked with (1) "mask work"; "*M*" or the letter "M" enclosed in a circle and (2) the name of the mask work owner provide constructive notice. Enforcement is via U.S. district court for plenary relief and via an International Trade Commission proceeding (ITC) border enforcement (territorial exclusion). 17 USC 910 and 911. A presidential proclamation in 1996 extended U.S. mask work protection to applicants from all WTO countries.

IV. Registration Requirements and Procedure

The power to define regulations for registering mask works is ceded by statute to the Registrar of Copyrights, of the U.S. Library of Congress. 17 USC 908. The registrar prescribes use of form MW for mask work registrations, and a $75.00 fee, per mask work registration. The Registrar defines requirements for submissions at 37 CFR 211 et seq. A mask work filing comprises at least: (1) Form MW, (2) payment for the fee, and (3) deposited mask works.
Form MW requires the following information:

Title: (for example the name of the corresponding IC product)

Nature of Deposit: (for example, "3 acetate sheets"; "3 photocopies of mask"; "2 ICs and 10 acetate sheets"). In this regard, acetate layers with opaque patterns have been used as actual chip mask. (It is unclear whether a paper photocopy would provide sufficient detail for small mask features.) The Deposit must be the most current form of the masks, subject to the following exceptions:

(1) an averment that the owner does not have access to the most complete form.

(2) owners of mask works in final forms of semiconductor chip products that are produced by adding metal-connection layers to unpersonalized gate arrays may separately register the entire unpersonalized gate array and the custom metallization layers. (Applicants seeking to register separately entire unpersonalized gate arrays or custom metallization layers should make the nature of their claim clear at Space 8 of application Form MW.) For these purposes, an "unpersonalized gate array" is an intermediate form chip product that includes a plurality of circuit elements that are adaptable to be personalized into a plurality of different final form chip products, in which some of the circuit elements are, or will be, connected as gates.

Owner information: name, address, citizenship

Date and Nation of first commercial exploitation: (of the actual chip produced from the mask work)

Nature of novel features: Brief description of novel features of the mask work, not otherwise common in the semiconductor industry.

V. Conclusion

Mask work registration is relatively inexpensive, quick, and appears to provide valuable protection.

If you have any other questions or need further information please feel free to contact us via email athttp://www.neifeld.com.

Richard Neifeld,
President,Neifeld IP Law, PC

About the Author:

Richard Neifeld, Ph.D.

Patent Attorney

Email address: general @ neifeld.com

Education
J.D. The George Washington University Law School 1994 Ph.D. Rutgers University (Solid State Physics) 1985 B.S./B.A. University of Rochester (Physics and Mathematics)
(Cum Laude and Honors) 1980

Experience

Neifeld IP Law P.C. - 2002

Partner in the IP law firm of Oblon, Spivak, McClelland, Maier & Neustadt, PC. - 1996

Patent Attorney - 1994

Patent Agent - 1992

Patent Technical Consultant - 1990

Staff Scientist for the U.S. Army's Laboratory Command - 1986

Post-doctoral Fellow, Rutgers University - 1985-1986

Former chair of the Interference Committee and current chair of the Services Subcommittee of the Interference Committee of the American Intellectual Property Lawyers Association (AIPLA). Member of the AIPLA, American Bar Association, Maryland Patent Lawyers Association, and the Patent Information Users Group. Extensive experience in "specialty matters" in the U.S. patent office, such as appeals, petitions, reexaminations, reissues, public protests, and extensive experience in foreign prosecution, and interferences and related litigation. Extensive experience in due diligence work, including investigations, database searching, and opinions.

Admitted to practice before the United States Patent and Trademark Office, the Virginia State Courts, the United States Court of Appeals for the Fourth Circuit, and the United States District Court for the District of Columbia.

Widely published in IP law publications, frequent lecturer to patent attorneys on patent law topics, and an active member of the patent bar associations. Founder and moderator for the popular "patentinterference" group on thegroups.yahoo.com/group/patentinterference web site, which is a forum for general information on patent law and practice with a focus on patent interference issues.

Co-founder of thewww.PatentValuePredictor.com automated patent valuation service, co-inventor of the underlying macro-economic model for valuing patents, and programmer of some of the code powering the automated valuations.

Five years of scientific research in applied physics areas of electro-optics, III-V materials, microwaves, vacuum deposition technology, superconductors, and electronics directed towards the U.S. Army's electronics, communication, and signal processing needs.



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